Espressif Systems /ESP32-P4 /MIPI_DSI_BRIDGE /RAW_BUF_CREDIT_CTL

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Interpret as RAW_BUF_CREDIT_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CREDIT_THRD0CREDIT_BURST_THRD0 (CREDIT_RESET)CREDIT_RESET

Description

dsi bridge credit register

Fields

CREDIT_THRD

this field configures the threshold whether dsi_bridge fifo can receive one more 64-bit, valid only when dsi_bridge as flow controller

CREDIT_BURST_THRD

this field configures the threshold whether dsi_bridge fifo can receive one more dma burst, valid only when dsi_bridge as flow controller

CREDIT_RESET

this bit configures internal credit cnt clear, 0: non, 1: reset. valid only when dsi_bridge as flow controller

Links

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